With scaling of dimensions in static random access memories, leakage currents increase dramatically. As dimensions decrease, memory devices occupy more and more area of the circuits. SRAM blocks become the major contributor to total stand-by power consumption. Excess power consumption in mobile applications can adversely affect battery life. Circuit techniques that reduce the supply voltage or increase the ground voltage are most often used for SRAM leakage reduction. However the combined biasing scheme with simultaneous supply voltage reduction and ground voltage increase, presents several advantages compared to simple schemes such as better leakage reduction and reduced standard deviation of leakage power consumption.
The generation of biasing voltages on virtual supply (Vvdd) and virtual ground (Vvss) rails, has been controlled in prior circuits in order to reduce the leakage currents of SRAM cells, while maintaining the stored data. To control the voltage of the virtual ground rail and/or of the virtual supply rail of SRAM cells in stand-by mode passive and active techniques have been used. Among passive techniques, PMOS and/or NMOS diodes may be inserted between the true power rails and virtual rails. The diodes are sized to generate a voltage level depending on the leakage currents flowing through them. Other passive techniques use transistors as resistors instead of diodes, or combine transistors with diodes. Using such passive techniques, it is hard to ensure a sufficient level for data retention due to process, voltage and temperature fluctuations. Therefore, it requires pre-characterization steps to determine the voltage levels ensuring data retention and leads to conservative sizing resulting in inefficiency of leakage reduction. One circuit uses respectively a PMOS diode and a NMOS diode to control the biasing voltages on virtual supply and virtual ground rails. This becomes problematic in that the rail-to-rail voltage control is not accurate as threshold voltages of diodes are sensitive to process and temperature fluctuations.
Another way to control the voltages of virtual rails is to use clamping circuits or voltage regulators. Series type or switched capacitance based are active techniques. However, for combined biasing schemes, these solutions require two comparators and the generation of two reference voltages which is area and energy consuming. Besides, the feed-back is not applied to the rail-to-rail voltage and thus can lead to data loss. A further active technique uses replica SRAM cell transistors to control the ground voltage while maintaining a rail-to-rail voltage above twice the maximum value of threshold voltages from the Pull-Up and Pull-Down transistors of SRAM cells. However, in this technique, only the virtual ground voltage is increased while supply voltage remains nominal, which is under-optimal for leakage reduction.